1. Field of the Invention
Aspects of the present invention relate generally to driver circuits used in CMOS integrated circuit (IC) design, and more particularly to a system and method of providing a current switch circuit to disable a driver circuit during a start-up period.
2. Description of Related Art
A driver circuit is an electrical circuit or electronic component used to control another circuit or component. Driver circuits are widely used in CMOS IC design, and may include circuits such as digital output buffers and power management driver circuits. To achieve, among other things, the switching or amplification characteristics commonly found in driver circuits, transistors, such as FETs and MOSFET, are employed. FIG. 1 illustrates an embodiment of an exemplary driver circuit. The exemplary driver circuit of FIG. 1 receives two inputs, a digital input DIN 100 and an enable signal EN 105, and produces an output signal OUT 145. The driver circuit operates using an internal power supply VDD 110. When the enable signal EN 105 is high, the driver is enabled. If digital input DIN 100 is high, PMOS transistor MP1 135 is turned on and NMOS transistor MN1 140 is turned off, and the output signal OUT 145 of the driver is high. If digital input DIN 100 is low, PMOS transistor MP1 135 is low and NMOS transistor MN1 140 is high, and the output signal OUT 145 is low. When the enable signal EN 105 is low, the NAND 115 and NOR 120 gates operate to block the input and disable the driver, the result of which is that transistors MP1 135 and MN1 140 are turned off.
The development of the bi-polar-CMOS-DMOS (BCDMOS) integrated circuit process has enabled a low-cost solution to be formed from a combination of a high-voltage, low on-resistance (RON) switch with standard low-voltage 5V and 2.5V devices. Devices employing double-Diffused Metal Oxide Semiconductors (DMOS) may benefit from the BCDMOS IC process by accepting high voltage power supplies while exhibiting fast switching during operation. In one embodiment, a device containing a DMOS transistor may enable a power supply of up to 18V to be used in a device.
FIG. 2 illustrates a cross section of an embodiment of an nDMOS device. DMOS devices allow relatively high drain-to-source breakdown voltages due to a lightly doped and extended drain region. In FIG. 2, the HV NWell 210 region of the DMOS device increases the drain-to-source breakdown voltage. A DMOS transistor achieves the high-drain-to-source breakdown voltage even though the DMOS gate oxide 240 is thin like a sub-micron CMOS device. The thin gate oxide yields a much lower RON*Area product for a 5V gate driver than a conventional high-voltage CMOS process, but at the expense of limiting the allowable VGS of the DMOS to 5V operation.
For certain driver circuits employing DMOS transistors, pre-driver circuits must be disabled during a start-up period to fully turn off an external transistor, such as a power MOSFET, being driven. If the external transistor being driven by a driver circuit is not turned off, the initial start-up current produced by the circuit's power supply in the circuit may damage the transistor. A conventional enable signal, such as shown in FIG. 1, cannot be used in these situations, however, due to the high breakdown voltage in the DMOS transistors contained in the driver circuit. Therefore, it may be desirable to provide a system and method that fully turns off the DMOS transistors in a driver circuit and the external transistor(s) being driven by the driver circuit to protect the external transistor being driven by the driver circuit from damage.